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en:verilog:start [2019/04/04 06:46]
alex
en:verilog:start [2019/04/04 06:47]
alex
Line 7: Line 7:
   * [[.:uart:]]   * [[.:uart:]]
   * [[.:​wishbone:​]]   * [[.:​wishbone:​]]
 +  * [[.:xfcp:]]
  
  
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