Verilog AXI Stream Components

Collection of AXI Stream bus components. Most components are fully parametrizable in interface widths. Includes full MyHDL testbench with intelligent bus cosimulation endpoints.

• AXI stream bus width adapter
• AXI stream synchronous FIFO
• AXI stream asynchronous FIFO
• AXI stream synchronous frame FIFO
• AXI stream asynchronous frame FIFO
• AXI stream/LocalLink bridge
• AXI stream rate limiter
• AXI stream statistics collection

Verilog AXI Stream Components Readme

• Verilog AXI Stream on GitHub

• Icarus Verilog simulator
• MyHDL